Cambridge Assembly
Practise assembly for Cambridge AS & A Level Computer Science 9618 and follow each register transfer within a stored-program computer.
Assembly source
Ready
0 of 1 characters consumed
Output from OUT
—
Printable ASCII is shown directly.
Instruction reference
Data movement
LDM #n · LDD address · LDI addressLDX address · LDR #n · MOV IX · STO addressArithmetic and compare
ADD value/address · SUB value/addressINC ACC/IX · DEC ACC/IX · CMP · CMIControl and I/O
JMP · JPE · JPN · IN · OUT · ENDJPE follows an equal compare; JPN follows a non-equal compare.Bit manipulation
AND · OR · XOR · LSL #n · LSR #n#15 denary · B00001111 binary · &0F hexadecimalAddressing modes
Immediate: value in the instruction · Direct: address in the instructionIndirect: address stored at an address · Indexed: address + IXRelative: target formed from PC + offset; the syllabus example table gives no separate relative opcode.Von Neumann architecture trace
Ready
Tick 0
Instruction 0
FETCH
DECODE
EXECUTE
CPU
data pathway
CU control
clock
Address busMAR → RAM
Data busMDR ↔ system
Control busCU ↔ system
I/O deviceIN and OUT use the buses
RAMinstructions + data
share memory
share memory
FETCH
PC contains the entry locationThe next instruction begins at the address held in PC.
Tick 0before instruction 1
Label and address view
Pass 1 · 0 labels
Pass 2 · waiting
Pass 1 records labels; Pass 2 substitutes each label’s address. This lab preserves Cambridge-style mnemonics and addressing modes without showing machine-code encoding.